Current Issue : April - June Volume : 2012 Issue Number : 2 Articles : 3 Articles
This paper introduces the Laboratory of Technologies\nfor Interaction (LaTIn) and briefly describes its current main\nprojects. The main focus of LaTIn has been developing new ways\nof human-machine interaction using computer vision techniques.\nThe projects are categorized according to the distance between\nthe human user and the machine being operated. For close\ndistances, appropriate for interaction with desktop computers for\nexample, we have developed eye-gaze based interfaces. For mid\nrange distances, we have built hand and body gestures interfaces\nthat are appropriate for virtual and augmented reality settings\nand, for large distances, we have developed novel multiple people\ntracking techniques that have been used for surveillance and\nmonitoring applications....
This paper examines the implementation of a retinal vessel tree extraction technique on different hardware\r\nplatforms and architectures. Retinal vessel tree extraction is a representative application of those found in the\r\ndomain of medical image processing. The low signal-to-noise ratio of the images leads to a large amount of lowlevel\r\ntasks in order to meet the accuracy requirements. In some applications, this might compromise computing\r\nspeed. This paper is focused on the assessment of the performance of a retinal vessel tree extraction method on\r\ndifferent hardware platforms. In particular, the retinal vessel tree extraction method is mapped onto a massively\r\nparallel SIMD (MP-SIMD) chip, a massively parallel processor array (MPPA) and onto an field-programmable gate\r\narrays (FPGA)....
This article describes a pipeline synthesis and optimization technique that increases data throughput of FPGAbased\r\nsystem using minimum pipeline resources. The technique is applied on CAL dataflow language, and\r\ndesigned based on relations, matrices, and graphs. First, the initial as-soon-as-possible (ASAP) and as-late-aspossible\r\n(ALAP) schedules, and the corresponding mobility of operators are generated. From this, operator coloring\r\ntechnique is used on conflict and nonconflict directed graphs using recursive functions and explicit stack\r\nmechanisms. For each feasible number of pipeline stages, a pipeline schedule with minimum total register width is\r\ntaken as an optimal coloring, which is then automatically transformed to a description in CAL. The generated\r\npipelined CAL descriptions are finally synthesized to hardware description languages for FPGA implementation.\r\nExperimental results of three video processing applications demonstrate up to 3.9Ã?â?? higher throughput for\r\npipelined compared to non-pipelined implementations, and average total pipeline register width reduction of up\r\nto 39.6 and 49.9% between the optimal, and ASAP and ALAP pipeline schedules, respectively....
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